Lip-Bu Tan sets B0 2nd try rule to cut delays
Lip-Bu Tan just set a tough new standard for engineers: if they can't deliver working chips on their second try (called B0 silicon), they're out.
Engineers do get one second chance (B0), but that's it. Fail again and it's goodbye.
Tan shared this at a major tech conference, saying the goal is to fix delays and make Intel's chip development way more efficient.
Lip-Bu Tan urges heavier pre-silicon verification
Tan pointed to the Xeon "Sapphire Rapids" project, which needed 12 revisions and 500 bug fixes before launch—a process he doesn't want repeated.
With Intel losing server market share to AMD (dropping from 91% in early 2019 to 72% in Q3 2025), Tan is also pushing teams toward heavier pre-silicon verification.
The hope? Get Intel back on top by making sure chips are ready on time and work right from the start.